Consider the following data path diagram.
Consider an instruction: R0 ← R1 + R2. The following steps are used to execute it over the given data path. Assume that PC is incremented appropriately. The subscripts r and w indicate read and write operations, respectively.
1. R2r, TEMP1r, ALUadd, TEMP2w
2. R1r, TEMP1w
3. PCr, MARw, MEMr
4. TEMP2r, R0w
5. MDRr, IRw
Which one of the following is the correct order of execution of the above steps?
2, 1, 4, 5, 3
1, 2, 4, 3, 5
3, 5, 2, 1, 4
3, 5, 1, 2, 4
(1) For the very first step: the instruction address is to be fetched (so that it can be accessed from memory)
Using 3. PCr, MARw, MEMr, the given instruction R0 ← R1 + R2 address is fetched from the PC to the MAR. (increment the PC)
(2) Now the fetched instruction is copied to the MDR, from where it is further sent to the IR for the process of decoding by using 5. MDRr, IRw
(3) The decoder starts decoding the instruction and realizes that the 
register is to be fetched first and stored in the temporary register then uses 2. R1r, TEMP1w
(4) Similarly in the instruction R0 ← R1 + R2, R2 is to be fetched.
Using 1. R2r, TEMP1r, ALUadd, TEMP2w
(5) Finally the result of the operation is stored in the register RO.
Using 4. TEMP2r, R0w