Consider the following statements.
I. Daisy chaining is used to assign priorities in attending interrupts.
II. When a device raises a vectored interrupt, the CPU does polling to identify the source of interrupt.
III. In polling, the CPU periodically checks the status bits to know if any device needs its attention.
IV. During DMA, both the CPU and DMA controller can be bus masters at the same time.
Which of the above statements is/are TRUE??
I and II only
I and IV only
I and III only
III only
Statement I: True, Daisy chaining it is a method of attending interrupt requests of the serially connected devices by prioritizing the interrupt requests.
The devices are connected such that the highest priority are kept first followed by the lower priority and then the lowest priority.
Statement II: False, For vectored interrupts, each interrupting device is assigned a unique code. This unique code can be of 4 to 8 bits in length. This unique code is sent over the database to the processor instructing which interrupt services routing to be executed.
Here there is no polling to identify the source of interrupt.
Statement III: True, Polling is the process where the status bits are checked periodically to determine the time for the subsequent I/O operation.
Statement IV: False, Both CPU and DMA controller cannot be bus masters at the same time because the CPU would release the Bus after it receives the request from the DMA and the Bus is returned to the CPU after the DMA releases it.